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MOTOROLA FALLS IN LINE IN THE STAMPEDE TO IMPLEMENT RISC TECHNOLOGY

The wraps are off Motorola Inc’s 88000 RISC microprocessor at last, but what exactly is it? Who is backing it? What software is available? John Abbott pulls it all together. After revealing preliminary details back in February, Motorola finally held the official launch of its 88000 RISC processor last week in both London and New York. The company was was confidently predicting that it would dominate the RISC processor market by the 1990s in the same way as it currently dominates the Unix world with the 68020, and revealed for the first time hardware and software supporters of the chip, support for multi processor, fault tolerant and graphics applications, custom special function units, and a number of board level products, software tools, and applications programs. Hardware manufacturers keen to align themselves with the 14 to 17 MIPS chip include Convergent Technologies, Data General, Encore, Ericsson, Integrated Micro Products, Motorola’s own Computer Systems Group, Tadpole, Tektronix and Stratus: IMP, Motorola and Tadpole were both showing board-level systems and software development platforms at the launch. Specialist machines can be expected from financial market manufacturers Quotron of Los Angeles and ruggedised systems maker Aitech of Isreal. 88Open Meanwhile compiler writers such as Greenhills, and real-time operating system specialists Software Components Group and JMI Consulting Inc are also working on 88000 products. Along with Motorola’s software partner Unisoft, these companies are members of the newly formed 88-open consortium of 88000 users, set up to specify standards and influence future developments: the full 22 strong membership, including four in Europe, has not yet been revealed. 88Open chairman Hans Heilborn of L M Ericsson revealed that 40 more companies were showing interest. Some 20 software products are already available, including compilers for Fortran, Basic, Ada, C, Prolog and Lisp, applications software from Informix and Ingres, and artificial intelligence and software co processors, including Personal Computer emulation software from Phoenix Technologies and Insignia Solutions, which according to Motorola’s Ray Burgess will allow MS-DOS code to runs as fast on the 88000 as on an 80386. Software development is aided by a full set of development tools and Unix V.3, running on Motorola’s Platform 88 development system, available from July. Motorola has also implemented what it says is the industry’s first procedure call standard set, which allows software modules in any high-level language to be interlinked. The 88000 is a three chip set, consisting of the 88100 primary processor, which includes both integer and floating point units, and a pair of 88200 cache and memory management chips, one supplying the processor with instructions, and the other with data. Motorola claims the 88200 is the first available RISC cache chip, and says it provides the equivalent of 50 to 70 memory and logic chips. Available in beta quality by late in the third quarter of this year, the 88000 is implemented in 1.5 micron CMOS technology and has a 20MHz clock speed, although a 25MHz version should be unveiled by the end of the year, and Motorola says it is working on a 1.2 micron implementation. The 88000, rated at between 14 and 17 MIPS integer performance and 7 to 12 MFLOPS floating point, is claimed to be between one and a half and two times faster than other RISC processors, and aimed at the general marketplace, rather than the technical emphasis of Sun’s Sparc Sun might well dispute that since AT&T, Unisys and ICL all intend to use it in general purpose business machines – and the recently previewed Intel 80960, which is aimed at embedded applications. Performance gains come partly from instruction pipelining and the mainframe technique of scoreboarding, which allows up to 11 operations to be processed concurrently, but also from advanced compiler technology. The chip also supports multi-processing and fault tolerance: up to eight 88200 cache chips can operate with each processor, giving 128Kb of fast local ca

che, and 88100s can be linked together to form multiple or parallel configurations. A feature known as Snoopy in the 88200 watches how data is used by other processors and can therefore identify when a stale piece of data is called for, enabling it to retrieve the correct information. Unisoft Corp is to implement an identical version of Unix System V.4 for the 88000 and 68000 family processors, both conforming to the Applications Binary Interface agreement signed with AT&T and apparently finalised only last week: the agreement assures Motorola and Unisoft full and early access to Unix V.4 and later releases. Unisoft chief executive Jeremy Thomas said that this would aid the conversion of 68000 applications to the RISC processor – but added that Unisoft would also be working on a set of tools to make this process very easy. Prices for the 88000 will initially be $500 for the 88100 and $800 for the 8200. Core for Unix By the turn of the year, once full production has begun, this should be reduced to $300 and $500. Although Motorola claims to be responsible for a third of the world’s CMOS and the lion’s share of Emitter Coupled Logic products, it has turned to ECL processor design specialist Data General Corp to perform the design implementation for the next generation version of the 88000. Data General’s Eclipse MV/20000 and MV/15000 both use ECL technology developed in co-operation with Motorola, which says it will manufacture the ECL 88000 at its Phoenix, Arizona plant for release in 1991, when it predicts performance levels of 100 MIPS. The ECL version will include five chips, an instruction set processor, memory manager, system controller, cache controller, and a system bus interface. Meanwhile, Data General says it plans to use the CMOS version in future computer system families, and will market a single-board 88000 processor for inclusion in its existing systems. President Ed de Castro said that he expected the 88000 to become the dominant core building blocks for systems designed to run Unix.

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