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November 22, 1993

IT’s CMOS ALL THE WAY FOR IBM MAINFRAMES AFTER FINAL KICKERS FOR PRESENT ECL ES/9000s

By CBR Staff Writer

Any effort to make bipolar silicon run much faster has effectively been halted at IBM Corp, which is putting its weight behind the cheaper, slower CMOS technology for its forthcoming parallel System/390 developments. Though new machines based on the current ECL chips will appear, performance gains will be due to an increase in processor number or a marginal increase in clock speed, rather than any fundamental changes in chip fabrication. The forthcoming CMOS implementation of the System/390 processor runs at about 70% of the speed of the uniprocessor 308X mainframe launched in 1982, but the IBM plan is to pull up to 192 of these chips into a co-operative cluster. Moreover, the company says that its CMOS speeds are doubling every two years so that by the late 1990s, CMOS implementations will be as powerful as today’s ECL. IBM’s biggest task is to convert its system software base to handle the new generation of parallel hardware. Its first offering – the parallelised read-only DB2 data server is with early customers now, but will officially ship in the first half of next. Customers will have to wait until 1995 for a full read-write parallel DB2 says William Reedy, director of the company’s large-scale computing division. Reedy is doing the Grand Tour of European systems software suppliers this week; user applications will run without alteration on the parallel machines, he insists – but system-level software will need a re-write. Before DB2 arrives, read-write parallel versions of the CICS transaction processing software and a full implemnetation of the IMS hierarchical database are scheduled to appear in the second half of next year. Reedy brushes aside any problems with building a parallel version of MVS, saying simply that OpenMVS has this licked and it will ship in the first quarter. In fact the company is circumventing the problem by running multiple copies of the operating system in each box – one on each six-processor node; an extension of the clustered Sysplex concept. Six of the CMOS processors are placed on one board, where they run as a tightly coupled unit under a copy of OpenMVS – a seventh chip implements the 3092 multiprocessor controller, handling interconnect with other members of the cluster. Up to 32 of these six-ways can be loosely Sysplexed, all of which should mean better margins for IBM. Not surprisingly, Reedy is not keen on saying how much cheaper it will be for IBM to manufacture the new boxes instead he launches into a parable about how it used to be possible to gauge the relative price of a product, be it car or mainframe simply by guaging its weight: This one is a tenth of the weight, of the old mainframes, he concludes, echoing other IBM hints that the new CMOS chips cost a tenth the price of equivalent ECL processors.

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