Integrated Information Technology Inc, based in Santa Clara, California, has announced a new addition to its family of chip engines for multimedia applications: the Data Compression Processor is the first single-chip implementation of the LZ-based compression algorithm, and is claimed to achieve up to 10 times the performance of other designs; an on-chip dictionary is provided, and no external memory is required; the chip’s high throughput enables development of applications supporting compression activity transparent to the user and the functioning of the system; the software version is implemented directly in the standard disk ROM BIOS, and the data compression processor is a single-chip engine with a 84 pin package; the chip provides a sustained throughput of 5Mb per second and decompression throughput of 8Mb per second; the chip and software come in at $30 for 10,000.
