VLSI Technology Inc has launched the Tape Ball Grid Array, a new package for high complexity, high density integrated circuits that is said to achieve higher levels of integration than traditional packages. Instead of wire bond technology, the silicon wafer is plated with gold bumps in a process called Thermal Compression Inner Lead Bond. The silicon die is then attached to a tape made of metal and an acetate-type material; it is the tape that provides the connections to the real world – hence the Tape in the name. The tape is apparently better for parasitic capacitance and inductance in that it causes fewer limits to signal traffic than other types of connection. The tape is supported by a stiffener and a cover plate is attached that acts as a protector and also a thermal enhancement. VLSI claims the integrated heat spreader and heat sink for power dissipation gives the Tape Ball Grid Array the same thermal performance as Ceramic Pin Grid Array packages and two to three times the power dissipation capability of Quad Flat Pack packages occupying the same board area. Traces are routed on the top side of the tape and vias make connections from these traces to tin/lead solder balls on the base of the package. Hence Ball. The balls are claimed to make connections easier and cheaper: because they do not have to go through holes like traditional wires, and the connections are made directly with the board, all that needs to be done to attach the package is heat the balls. The application of heat can be localised and VLSI suggests use of infra-red heating. The solder melts and the balls will all flow to the same level. VLSI says this eliminates the problem experienced with Quad Flat Packs of bent pins not connecting. VLSI says the Tape Ball Grid Array extends the number of connections to almost 700 pins, which means more logic can be put on to a chip as there are a higher number of interfaces between the chip and the outside world. To begin with, VLSI is marketing the package for people building boxes for high level engineering design or workstations used in movie special effects. It says that eventually, the package will provide the high level of complexity, with faster signal processing, needed for applications such as television set-top boxes and networking. VLSI reckons the Tape Ball Grid Array makes manufacturing cheaper because the maker can use one high complexity chip, which takes up less space on a circuit board. The Tape Ball Grid Array is smaller than either Quad Flat Pack or Plastic Pin Grid Array packages. There is a promise of higher performance both from higher levels of integration, and also from the fact that the silicon will run cooler so that smaller and cheaper cooling systems can be used. However, it is not saying exactly how much the package costs, saying only that this depends on quantity ordered and number of pins in the array. Tape Ball Grid Array samples and prototypes are currently available. There are six packages ranging from 360 to 672 solder balls. Both 0.6 micron and 0.5 micron process technologies are supported. Production of the packages is scheduled for early 1995.
