Valid Logic Systems Inc, San Jose, California announced as we closed for press last night that it had filed patent infringement suits against six leading computer-aided engineering firms – Daisy Systems, Mentor Graphics, GenRad, HHB Systems, Teradyne and Cadnetix. The complaint seeks injunctions and damages for alleged infringement of Valid’s patent on a Method and Apparatus for Modelling Systems of Complex Circuits. Valid believes the patent covers a fundamental method and apparatus for hardware modelling, which allows real integrated circuits to be used as simulation models.
This article is from the CBROnline archive: some formatting and images may not be present.
CBR Online legacy content.