A team at the UK’s Cambridge University Cavendish Laboratory has developed a memory design that could lead to multi-gigabit chips the size of a thumbnail replacing current DRAM and Flash memory designs. The Anglo-Japanese group has been funded by Hitachi Corp, which hopes to commercialize the technology. Chips using the design, which has been dubbed Phase-state Low Electron (hole)-number Drive Memory (PLEDM), could be used in high capacity mobile storage devices and replace current storage devices such as PC hard drives.
The Cambridge team has been working on memory designs that overcome the problems of current DRAM chips. In a DRAM, the information is stored in capacitors on a MOS integrated circuit. Typically each bit is stored as an amount of electrical charge in a storage cell consisting of a capacitor and a transistor. The problem being that while transistor size has reduced dramatically, the size of the capacitor has not, leading to DRAM designs that use ‘tower block’ capacitors, in an effort to reduce space. According to Haroon Ahmed, Cavendish professor of microelectronics, the team tried to surmount this problem by using a two-transistor ‘gain’ cell design. Instead of using a capacitor, the team have developed a PLEDTR transistor that can be stacked onto the gate of a conventional MOSFET transistor. This can be modulated into an ‘on’ or ‘off’ state. The large current for the on state means write times of less than 10 nanoseconds, while the current for the off state was actually lower than Hitachi’s equipment could read, according to Ahmed.
Doing away with the capacitor will mean the development of high density arrays with a cell size smaller than a DRAM cell. Ahmed said that batches of cells had already been produced at Hitachi. Chips using the design could be produced using a standard 0.2 micron process, Ahmed claimed. Hitachi is currently working on ways of converting the technology for mass production, which is expected to start around 2005.
