Expanding the range of variants it offers under the agreement that allows it to make RISC processors under licence from MIPS Technologies Inc, Toshiba America Components Inc has launched the R3900 RISC processor core, a 32-bit part claimed to achieve R4000-class performance with 52.5 Dhrystone MIPS and power dissipation of about 400mW at 50MHz; the company has also built the core into Southern Cross, which it describes as a stand-alone microprocessor that enables users to evaluate the R3900 and shorten time-to-market. Aimed at applications such as television set-top boxes and Personal Digital Assistants, the 3900 offers variable instruction cache and data cache sizes and parameters and includes on-board power management functions. The part is also aimed at multimedia applications, facsimile modems, games, laser printer controllers and X-terminals. The R3900 is the first RISC microprocessor that was fully specified by the Toshiba San Jose facility and was jointly designed with Toshiba’s engineering facility in Kawasaki. The engineers took the standard R3000 architecture and designed it into a 26 square millimetre part with 4Kb instruction and 1Kb data cache, giving it the MIPS I+ enhanced instruction set and a modified five-stage pipeline structure. The set adds built-in branch-likely instructions that eliminate the no operation instructions from the program flow for more compact code, and there is a built-in one-cycle Multiplier and Accumulation operation to reduce the multiplication and addition functions into a single operation to provide signal processor-like functions to enhances graphics and communications capabilities. The part runs off a 3.3V supply. Green Hills Software Inc will supply C/C++ compiler, assembler, linker, library tools and debugger and Hewlett-Packard Co is helping Toshiba with an on-chip software debug module. The Southern Cross – the TMPR3901F will sample in May, with volume set for the third quarter. It is expected to be $30 in 1,000-up quantities.
