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November 30, 1988


By CBR Staff Writer

Since the announcement of the 3090 S series of machines, everyone has accepted that it is a mid-life kicker for the 3090, and that it equates to the F models that were widely anticipated – F is just S with a lisp. G models could still come, depending on what else IBM has up its sleeve and when it decides to let the Summit range of machines out of the bag. But when talking to customers IBMers are quick to point to the S designation and ask, Why do you think we called it S? And answer their own question: This is the Summit. It is easy to understand why IBM would want everyone to think so.

Obsolete There comes a time when IBM is likely to obsolete everything in its mainframe CPU locker and start afresh, and we are fast approaching a time when IBM could get away with that. We are also fast approaching a time when IBM’s figures could do with brightening up. If IBM signals that a new machine is imminent, then the old machines stop selling. The best answer to that is to tell us that the new machine is already here. The only way to determine whether IBM has shot its bolt on the 3090 with the S series announcement is to look at the technology in the new machine, and at the technology of what IBM says is possible on the horizon. It has taken a while to get under the covers of the S model, but the shape of the product’s insides is now becoming clear. If we first take the Thermal Conduction Module contents we see that the number of chip sites on the TCM remain unchanged at 132. They are still not full, insists IBM, but close to full, which probably means 131 are used. The cooling technique has remained unchanged since the original TCMs were described in 1980, and the ECL logic circuits that make up the CPU remain the same technology with some minor improvements in integration levels.

The original 3090 had an 18.5nS cycle time, and IBM has always said that it is made up roughly half and half between on-chip activity and inter-chip communication. In other words, if there were no wiring between the chips and it was all one integrated circuit, it would cycle at 9nS to 9.5nS. This ratio was improved slightly in the E models with 9nS taken up by inter-chip communication and the combined switching times of the relevant chips taking up 8.2nS in a cycle. The result is 17.2nS in total. Clearly with the chip sites remaining unchanged, it is a little difficult to see how the inter-chip communication processes could be speeded up without some radical re-design. It represents a radical re-design to have achieved the 7.5nS inter-chip communication time on the S model TCMs, implying that there has been some integration of function onto fewer chips, reducing that time. The combined switching time of the processing chips also equals 7.5nS giving a total processor cycle of 15nS. Yet the performance improvements is comparatively minor. Going from 9nS to 8.2nS to 7.5nS does not suggest massive steps forward in integration within the chips, more likely there is just sufficient to tempt customers across the the new TCMs. This suggests that there is something else in the S models as yet unannounced and yet to come, and that IBM just wants as much of its customer base as possible on the new machines. But what is stopping IBM from simply continuing to up the speed of its ECL chips with greater and greater integration? IBM believes that it could design, for delivery in the 1996-97 time frame, a CPU where the combined chips could theoretically cycle at 2nS.

This leaves us guessing about its interchip speeds, and asking why it doesn’t launch it as soon as possible and rid itself of the worrisome Japanese, as well as what must be a worrisome series of financial results. We would guess that any such processor built in this way may maintain the same equable ratio of interchip time and chip switching time, yielding a CPU that cycles at 4nS, an improvement of almost four times the speed of the 3090. The reasons why not are complex. First, there is no way that the current TCM design could take the heat away from a family of chips of that type. Second, the c

hips themselves would have to be slightly bigger, giving IBM some yield problems that it would not be happy with given its current conservative approach to testing and qualifying chips for final use in a machine. Also there would have to be more chips on the TCM than it can currently hold, say 150, and since these would each be slightly bigger, that leaves a substantially larger TCM, which would be even harder to cool. We could simplistically state that Summit will be here only when IBM makes such a processor, and given the desire that IBM has to have the world convinced that Summit is either a long way off, or that it is already here, IBM would like us to hold that thought. So what are the practical options open to IBM? There are two possible approaches to dissipating heat. GaAs chips wouldn’t give off so much heat, even at an integration level as dense as IBM would need to produce the required effect. But GaAs chips are an unknown quantity to IBM and although the company is known to be in production with GaAs parts, because of its conservative thinking, it is unlikely to make it the preferred CPU technology for the next generation of mainframes.

Critical Yields and integration levels of GaAs have to be established in other, less critical areas of IBM’s technology before it will want to build a whole mainframe of the stuff. The other approach to heat dissipation seems far more satisfactory and more IBM like. That is improve the current TCM package to handle much more heat, or rather power output. If we assume a CPU in the neighbourhood of 1.5m circuits, this could be implemented with 10,000 circuit chips in a single 140- to 160-chip TCM. With chips that switch in the sub 200pS range, IBM feels this could achieve a 4nS cycle time. The TCM would need to be substantially better at heat dissipation to let that lot run without melting. But the TCM is just a jacket of cold water, running over a series of aluminium pistons. At one end of the piston is the water, at the other end the chip. The chip heats one end, and the water takes the heat away at the other. Helium instead of air is used inside the TCM because it is a smaller atom, and as such a better conductor in the infinitesimal air-spaces where the chip doesn’t quite make contact the piston end. You wouldn’t think that would make a difference, but it does. Another thing that makes a difference is the shape of the end of the piston. The flusher it is with the chip, the better the heat conduction away from the chip. IBM uses convex ends to these conducting pistons in the hope that minor distortions of the chip face will fit better onto a convex face. It does, and again the difference is surprising.

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