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January 5, 1988

TEXAS TO DESCRIBE 32-BIT GaAs RISC CHIP AT ISSCC

By CBR Staff Writer

Texas Instruments pioneered the 16-bit microprocessor with its TMS9900 family, but failed to capitalise on its early breakthrough and was been left to pick up the crumbs with its second-generation 16-bit part, the TMS99000. After an agreement with National Semiconductor to co-develop the NS32000 family was aborted, the company has been left with no contender in the general purpose 32-bit market – and has even had to go to Motorola and Intel for the engines to take its proprietary Business Systems computer family up into the Unix mainstream. Now however, Texas plans to reassume the role of pioneer, and according to Electronics, will be describing what is almost certainly a world first – a 32-bit reduced instruction set microprocessor in Gallium Arsenide, at the International Solid State Circuits Conference in San Francisco, February 17 to 19. Companies like to intrigue potential attendees at the conference ahead of time, and at this stage, Texas has gone as far as to say the part will have 16 32-bit registers, a 32-bit arithmetic-logic unit, and operate a six stage pipeline. The part will be fabricated using I2L, integrated injection logic, and a 1.5 micron heterojunction GaAs bipolar process. No word yet on the target applications, but they are likely to be primarily in defence. General Electric is also due to describe a 32-bit microprocessor at the conference: the CMOS GE part is noteworthy for its 40MHz clock rate and 25nS access time. It has four-cycle instruction and seven-cycle load-operation pipelines, and has a 320 byte instruction cache on-chip.

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