Tangent Systems Corp has announced a joint technology agreement with Toshiba Corp and Motorola’s Application Specific Integrated Circuits Division for use of its sea-of-gates gate array computer aided design tools. According to Tangent it has developed an entirely new layout system for large sea-of-gates and channelled gate arrays with help from its two partners. It reckons that its software enables the use of 70% to 80% of three-layer metal gate arrays and 45% to 60% for two-layer designs. The entire family of 1.5 micron CMOS base arrays, from 5,330 to 129,042 gates, is supported. Toshiba plans to take on the new tools to place and route its TC110G series of gate arrays while the Motorola ASIC Division will use it in its recently announced MAX family of high density channelless gate arrays. Installation of the sea-of-gates layout system is planned in the next 30 days.