Toshiba will apply Takumi’s hot-spot fixing methodology, addressing layout-related problems on a chip which can lead to failure, impacting yield.
Toshiba said that as a result of Takumi’s hot-spot system it was able to automate its cleaning process and improve turn around time, in spite of the complexity and large data files associated with sub-65nm SoC technology.
The number of hot-spots was reduced from over 47,000 to just 40 in 12 hours. Furthermore, Takumi’s vendor-agnostic approach enabled Toshiba to maximize the usage of its existing EDA software, thereby protecting current investments.
The partnership enables on-going collaborative development, and exemplifies how DFM methodologies in mask data preparation, defect analysis and layout modification can close the gap between design and manufacturing for sub-wavelength processes.
