Futurebus, now officially known as IEEE 896.1 after gaining formal IEEE standard status in September, appears to be in the ascendant, with Tadpole Technology one of the first to announce its commitment to the second generation 32-bit bus, which it says will be used for two boards to be released in the second quarter of next year – the first a highly integrated card based on a RISC CPU with sep-arate instruction and data caches, and the second a bus link input-output card designed as a powerful input-output processor which will provide full links for a co-residing VME implementation. According to the Futurebus Users and Manufacturers Group based in Brackley, Northamptonshire, the bus is particularly relevant to multi-processing and fault tolerant architectures, and we can expect more announcements in the near future: chip manufacturers supporting Futurebus include National Semiconductor, Ferranti and Texas Instruments.
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