Synopsys Inc claims its new Behavioral Compiler synthesis tool drastically simplifies integrated circuit design and also makes it more reliable. The Mountain Viewer claims it’s suitable for virtually all algorithmic designs, for applications such as telecommunications, graphics, multimedia, data encryption, and servo control. Behavioral Compiler, says Synopsys, raises the level of design specification to a much higher level than logic synthesis. A designer using logic synthesis must write a description in register transfer level code – a highly restrictive subset of either the Verilog or VHDL programming languages. Behavioral Compiler enables the use of a much higher level of the Verilog and VHDL languages to specify the functional behaviour of the circuit, without detailing the exact architecture. It claims this can cut the time for a specification tenfold. With register transfer level design, once the code is written, the design’s architecture is frozen, making high-level trade-offs impractical. With Behavioral Compiler, the behavioral description doesn’t constrain the developer to any particular architecture, meaning it can be altered by changing high-level constraints. Behavioural Compiler is in beta test and should ship by the end of the year, at $69,500.
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