Synopsys, a provider of software and IP for semiconductor design, verification and manufacturing, has released DesignWare AEON Non-Volatile Memory (NVM) IP for multiple 180-nanometer (nm) process technologies.
The DesignWare AEON NVM IP products include few-time programmable (FTP), multiple-time programmable (MTP) radio-frequency identification (RFID) and erasable programmable read-only memory (EEPROM) IP offerings, the company said.
Offered in 100 different memory configurations and implemented in standard CMOS process technology with no additional mask or process steps required, the DesignWare AEON NVM IP is designed for wireless, RFID and analog and mixed-signal SoC designs.
The new IP offerings deliver optimised electrical performance for a wide range of end applications, including performance trim and calibration in precision analog designs, data storage in ultra-low power wireless applications, or high endurance in real-time datalogging applications.
The company claims that these offerings help designers reduce the cost and risk of integrating NVM IP into their SoC designs.
The non requirement of high voltage generation circuitry allows designs to operate from a single core supply, eliminating the complication of generating a separate, high-voltage signal for NVM programming, or supporting a high-voltage I/O pad.
DesignWare AEON NVM IP also provides support for extended temperature ranges beyond industry standard (up to 125 degrees C for commercial and industrial products and up to 150 degrees C for automotive products) for enabling designers to build robust SoCs.
Synopsys vice president of marketing for IP Systems John Koeter said with reprogrammable NVM IP technology, Synopsys offers SoC designers a proven offering optimised for power, area and performance that lowers their integration risk and speeds their time-to-market.
