Electronic design automation (EDA) firm Synopsys and semiconductor equipment manufacturer Applied Materials have collaborated to develop technology computer-aided design (TCAD) models for next-generation semiconductor devices.
The collaboration encompasses front-end-of-line (FEOL) processing, including process, topography and device simulation and back-end-of-line (BEOL) reliability, including interconnect simulation.
The collaboration enables Applied Materials to supply critical film properties and device characterisation data from its advanced process systems to Synopsys, enabling the development of models using Synopsys’ Sentaurus TCAD tool suite.
The models derived from the TCAD collaboration will enable customers to speed up process development for 14-nanometre (nm) and 11-nm logic and new memory chip technologies, allowing them to lower cost and reduce time-to-market.
The Synopsys TCAD tools help to reduce the number of engineering wafers needed to develop new technologies, acting both as a prototyping tool to explore new device architectures before a process is defined and as an engineering tool for process integration and optimisation.
Synopsys Silicon Engineering Group senior vice-president and general manager Howard Ko said TCAD modelling has been essential for the development of 3D FinFET and memory technologies.
"The combination of Applied Materials’ equipment and Synopsys’ TCAD software will enable process engineers to continue scaling logic and memory devices," said Ko.
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