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July 7, 1987


By CBR Staff Writer

Sun Microsystems Inc today introduces the first Sun-4 Unix workstations based on its 10 MIPS SPARC – Scalable Processor Architecture – reduced instruction set microprocessor, and announced a comprehensive licence programme aimed at winning industry standard status for the SPARC. On offer are the SPARC architecture, operating system, development tools and C compiler, as well as the chips themselves, currently available from Fujitsu Microelectronics Inc, Cypress Semiconductor Corp, and Bipolar Integrated Technology Inc. Sun and Fujitsu implemented the SPARC on a 1.5 micron 20,000 gate CMOS array, and combines the MB86900 Integer Unit with the MB86910 Floating Point Controller to create the processor for the Sun-4/200, which is object-code compatible with Sun’s Motorola-based workstations, so that software only needs to be recompiled. Cross compilers are available so that Sun-2s and 3s can be used as development systems for 4s and vice versa. The SPARC is differentiated from other RISCs in that it uses a large windowed register file to maximise performance and simplify compiler design. In its initial incarnation, 120 32- bit registers are organised into seven register windows. Special tagged instruction types support artificial intelligence languages, and the fact that the entire design requires only 50,000 transistors means that it can be reimplemented in new chip technologies quickly. Sun says work on faster implementations are already well down the track – and the company sees 100 MIPS on the desk-top by 1990. It sees SPARC applications in parallel processing, robotics, embedded intelligence and communications as well as workstations and servers.

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