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February 9, 1999


By CBR Staff Writer

More details about the cooperative venture between Sony Computer Entertainment Inc and Toshiba Corp are likely to emerge next Tuesday at the ISSCC International Solid-State Circuits Conference in San Francisco (CI No 3,538). The two are working on a chip, using a MIPS core that will power the newest Sony Playstations. Operating with a 1.8v supply at 250MHz, the 0.18 micron, four metal CMOS chip includes a large number of independent arithmetic units and a 128-bit wide internal bus. Over all, there are ten floating point multiple accumulators, four dividers and an MPEG-2 decoder. The high clock speed, wide bus and independently-operating processors provide the high- bandwidth data streams needed for the Playstation’s dynamic display requirements. Also at the ISSCC, which has the theme of high-bandwidth systems, the organizer promise several examples of silicon-on-insulator chips, including PowerPC and Alpha microprocessors operating above 500MHz, as well as technologies for digital subscriber line applications up to 70Mbps on conventional telephone wires. The conference begins on Monday February 15 until Wednesday 17, with 3,000 attendees expected.

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