Siemens AG and Motorola Inc have launched a 12 inch wafer pilot production line through their joint Semiconductor 300 R&D project. The two hope that the pilot line – which is based at Siemen’s production plant in Dresden, Germany – will enable them to establish the latest technology on 12 inch wafers (8 inch is currently the norm). Siemens intend to use the line to test 64Mb dynamic random access memory (DRAM) built using 12 inch wafers. The German industrial giant stresses that it is currently testing the technology, and says that cost per square inch of silicon must match 8 inch wafer levels or the price for performance will not be viable. Siemens envisages that 1Gb DRAMs built on 0.2 or 0.18 micron process technology will be the driver for the 12 inch wafer technology and expects to deliver volume production of these widgets in 2 to 3 years. Meanwhile, Motorola will use the line as a test bed for its embedded technologies. It is also intends to build a production plant for the new wafer technology in Virginia. The two companies estimate that the total R&D cost of the Semiconductor 3000 project will be around $259m. Total spend so far has been around $161m. Tackled on whether the project was the first to implement 12 inch wafer technology, the firms admitted that some Korean manufacturers had parts of the puzzle put together but claimed that they had the first complete tool-set in the pipeline. However, both were at pains to suggest that the project was a testing ground and they were not yet getting good yields. Meanwhile, erstwhile Siemens partner IBM Corp says it too is commencing work on a $700m pilot production line in East Fishkill, NY to research 12 inch wafer technology, as well as extending its copper interconnect breakthroughs and working on advanced lithography including deep, deep ultraviolet and x-ray/e-beam technology.