New from the programmable products division of SGS Thomson Microelectronics NV is the STMA2000 family of mixed signal arrays, and a new low-cost fuzzy logic compiler for its ST62 microcontroller family. The STMA2000 series is targeted at users wanting to design high performance devices, and combines a so-called ‘sea-of-gates’ approach for digital and ‘sea-of-components’ approach for analogue elements. The new fuzzyTECH ST62 Explorer Edition compiler, co-developed with Aachen-based Inform GmbH, marks Thomson’s entry into the fuzzy logic tools market. The software is optimised for the basic 6-bit ST62 chip family, which is suitable for control devices in washing machines and other domestic appliances. A new version of FuzzyTECH is also promised for the 8 to 16-bit ST9 microcontroller by the end of the year, and support for the 16-bit ST10 is already offered by Inform. Research on a new microcontroller with built-in fuzzy logic co-processors is also under development.
Corimme
The so-called Weight Associative Rule Processor, Warp, is being co-developed with researchers from the University of Catonia in Sicily as part of the Corimme project. This device will be targeted at applications such as character recognition, process control, signal processing and neural learning. The fuzzyTECH compiler is a Windows-based development environment for personal computers. It provides tools for applications design from the initial concept, to the editing stage, debugging, simulation and then code generation. It has several graphic editors for handling rules generation, linguistic variables and system structure, with 8-bit resolution for all internal and external data. It offers designers up to 125 rules per module and up to seven labels per variable and provides waveform display and three-dimensional block diagrams that help simulate applications. These graphs and can then be displayed side by side in multi-windows enabling designers to compare various elements of their application such as power input and distance and then edit them, on screen, in a debugging Window. The integral code generator is then used to produce optimised ST62 assembly language code that can be assembled and linked with other application modules and loaded into an ST62 microcontroller. Thomson believes this code compiled approach to be a major advantage of the fuzzyTECH system, and one of the most important factors in the decision to team with Inform GmbH. Both companies are to distribute the system, which is priced at $400. On to the STMA2000 family.
By Lynn Stratton
According to Dataquest, the BiCMOS and linear array sector is one of the fastest growing groups within the world semiconductor market – a trend Thomson’s Analog Cells and Arrays group, Anaca, intends to exploit with its new mixed arrays. The devices, which are produced at SGS Thomson’s Grenoble facility, includes seven members. These range from the STMA20700, which is around 0.25 square inches and contains only analogue and input-output tiles, to the STMA23800, which measures 1.5 square inches and boasts 228 analogue, 1,781 input-output and 3,424 digital tiles. They are based on the same 10V BiCMOS process as Thomson’s STKM2000 analogue-digital series. This has the advantage of combining analogue’s high speed and precision with the digital speed, density and low power consumption of the CMOS world. Thomson says the new family is easier to customise however, since it uses prediffused master slices that require only four mask levels compared with the 15 needed for standard cells. The new arrays have digital, analogue and input-output tiles; pad tiles for package connections; and dedicated power-on-reset, bipolar switch, and start up tiles. The analogue tiles contain bipolar and metal oxide semiconductor field effect transistors, polysilicon capacitors and both 1K and 25K resistors. Device level routing is carried out using the same tool as for cell level routing, which gives near 100% routing density. The digital tiles, also with a high routing density, have 10V compatibility and the input-output ti
les house PMOS, NMOS, PNP and NPN transistors, a capacitor, high and low resistors. These enable digital input-output buffers, RC or crystal oscillators and analogue buffers to be implemented. Each input-output tile has a 5mA drive capability and is not dedicated to a particular input-output pad. ESD protection and ‘Zener zapping’ for on-chip parameter adjustment is built into each pad tile. A range of library cells, between 2.7V and 11V are also available to help reduce design times. The digital library offers Boolean gates, internal buffers, latches and multiplexers; the anlog, amplifiers, comparators, oscillators, power-on-reset, voltage references, switches and bias generators. All are available now on Cadence Design Systems Inc’s Sparcstation systems, with Mentor Graphics Corp to follow by the end of the year.
Coffee machines
Thomson’s computer-aided design tools for mixed circuit development are also available to provide, the company says, a safe, low cost design environment. Average cycle time design cycle ranges from around 22 to 30 weeks depending on the nature of the array. Thomson offers customers its services through a number of design centres it has across Europe, the US, Asia Pacific and Japan and will collaborate with customers from the schematics design stage through to prototyping if required. Mixed arrays can be used for a wide variety of possible applications ranging from monitors for electricity, gas and water metering, sensors for metal detectors and intelligent tags for factory automation systems to heat controls in hair dryers, and power and timing controls in domestic appliances like microwave ovens and coffee machines. They can also be used for controlling hard and floppy disk drives and ink-jet heads in computers and for power supply management, line interfacing and filtering in telecommunications applications. The STMA2000 family is available now, with pricing dependent on size, complexity and design input.
