Silicon Graphics Inc was somewhat skeptical when Intel Corp first revealed its MMX multimedia extensions to the x86 instruction set earlier this year (CI No 2,868) but now it’s had a change of heart and introduced its own set for its very own MIPS chip. The new MDMX MIPS Digital Media Extensions were introduced yesterday by SGI’s MIPS Technologies Inc, along with MIPS V, the next generation instruction set for the MIPS chip. The company says it has maintained compatibility with the existing MIPS 1 to MIPS 1V architectures, which now have an installed base of some 13 million. The extensions are intended to allow for fully integrated real-time processing of multiple audio, video, 2D and 3D graphics streams on a single chip. The MIPS V instruction set, a superset of all previous instruction sets for the MIPS chip, adds the paired single data type to double the performance of floating point compute applications by processing two 32-bit operands in parallel along a 64-bit data path. MDMX, which is separate from, but compatible with MIPS 1V and newer instruction sets, has an extended 192-bit accumulator similar to those found in discrete digital signal processing devices. This should speed up the performance of on-chip real-time video compression, digital audio surround sound and data compression. The instruction set will be implemented on future processors from MIPS and its partners.
