Philips Semiconductors claims its new silicon-on-insulator process will lead to cheaper, smaller and more energy efficient chips. The division of Philips Electronics NV, Europe’s largest semiconductor manufacturer, says that its new EZ-HV process allows the simpler integration of high-voltage (HV) and low-voltage analog and digital circuitry on silicon chips.
Philips says that the difference between the EZ-HV process and silicon-on-insulator (SOI) techniques pioneered by IBM Corp, is that SOI chips with high voltage transistors need a thick layer of silicon to guarnatee insulation. This prevents SOI chips from carrying high densities of transistors, and increases the amount of silicon they consume in production. Philips’ EZ-HV process fabricates high voltage transistors in an extremely thin layer of silicon, which is cheaper to produce. The transistors are then insulated with silicon dioxide, which means that high and low voltage transistors can be packed more tightly.
The new process will initially be used for electronic lighting applications and reducing the size of equipment power supplies, Philips said. It anticipates that the chips will also be used in PCs, laptops, fax machines, printers and driver ICs for plasma panel displays.
