Philips Semiconductors, the chip making arm of the Dutch electronics group, yesterday announced a 250m euro ($252.3m) expansion to its Nijmegen, Netherlands MOS4YOU fab, increasing its manufacturing capacity 50% to 300,000 8 wafers and adding 200 new staff to its 4,000-strong payroll.
Philips said the expansion, which brings its total investment in MOS4YOU to $1bn since its inception in 1996, is a timed response to a boom in demand for semiconductors for DVD, TV, Smartcard and communications applications.
Already Europe’s largest chip making complex, with five fabs on site, Philips’ Nijmegen facility employs 0.18 micron CMOS process technology, and will next year add a further 200 staff in addition to those destined to staff the extension.
The Dutch company says its latest expansion to the facility will add particular strength to its 0.18 micron CMOS process, as it will see the company implement an enhanced version of its own CMOS18 technology. This will include the use of Low-K dielectrics, an additional local interconnect metallayer, and new high-density memory cells. All of these enhancements are geared to reducing the capacitance leakage problems associated with smaller chip geometries, and they are backed up by Philips’ decision to employ Dual-V (dual threshold voltage) technology, which means CMOS chips can be geared either for very high-speed or low-leakage as required.
The benefit of low-K dielectrics lies in the use of hydrogen silsesquioxane-based flowable oxide (HSQ) as the dielectric (non-conducting) insulating layer between different metal layers and gates. Conventional dielectric layers stop capacitance leakage, but they still create so-called parasitic capacitance, small capacitors in the insulting layers which have to be charged and discharged whenever logic signals pass from one part of a chip to another. But this problem goes away using HQS, Philips claims.
