Sunnyvale, California-based Performance Semiconductor has announced a new surface-mount plastic packaging technology for its PR3000 32-bit RISC processor chip set implementations of the MIPS Computer Systems Inc R3000, which reduces by 40% the prices of 25MHz and 33MHz products. These lower prices, says the company, establish new worldwide cost-performance records for all 32-bit processing with either complex instruction set or RISC technology. The new versions of the 25MHz and 33MHz products are scheduled to be in prototype this month. The PR3000A CPU and memory manager will be available in a 160-pin plastic surface-mount gull-wing configuration, and the PR3010A floating point unit will be available in an 84-pin surface-mount PLCC with J-bend lead configuration. The PR3100A write, read and parity buffer, which contains all the support logic required and establishes the system interface bus to main memory and input-output, will also be available next month, in the 160-pin plastic surface mount gull wing configuration. This three-chip set, when supported with 64Kb data cache and 64Kb instruction cache, it is claimed, yields 21 MIPS of sustained integer throughput at 25MHz, and 28 MIPS at 33MHz. On double precision Linpack performance it rates 4.1 MFLOPS at 25MHz and 5.4 MFLOPS at 33MHz. With the reductions, the PR3000A and PR3010A are fixed at $150 for 25MHz and $190 for 33MHz, in 1,000 units. The 1,000-unit price for the PR3100A is $50 at 25MHz and $62 at 33MHz. Most applications, says the company, have used Unix software previously, though as part of the Advanced Computing Environment, the OS/2 3.0 operating system is now in development – behind the times, fellahs, it ain’t called that any more – to enable the use of MIPS R-series chip sets at the desktop to run application software written for MS-DOS.
