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October 7, 2009

OVP Initiative releases new models of ARM Processors

For v4 and v5 instruction sets from ARM

By CBR Staff Writer

The Open Virtual Platforms (OVP) initiative has released new models of ARM processor cores. These models work with the OVP simulator, OVPsim, and have performance of millions of instructions per second (MIPS).

The company said that the ARM models released are for the v4 and v5 instruction sets from ARM, supporting 13 processor cores across the ARM7, ARM9 and ARM10 families of processor cores.

The company claims that the models are instruction accurate, enabling simulation speeds of hundreds of MIPS meeting the requirements of application and firmware engineers for their development environments. In addition to working in OVP virtual platforms, the models include SystemC/TLM-2.0 interfaces, enabling native operation in SystemC environments.

Simon Davidmann, president and CEO of Imperas and founding director of the OVP initiative, said: “Open Virtual Platforms provides needed modeling and simulation tools for next generation embedded systems software development. The models of the ARM processor cores give OVP users needed models.

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“Also, working with Synopsys as a founding member of the System-Level Catalyst Program ensures interoperability with the popular Synopsys system-level tools, the DesignWare System-Level Library of models, and virtual platforms using the Innovator development environment.”

In addition to making the models for ARM processors available as free and open source, OVP offers free, open source example virtual platforms for OVP users to download from the OVP website.

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