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Technology / AI and automation



Santa Clara, California-based OPTi Inc has launched a core-logic chip for mobile computers, the 82C465MV, that supports all 80486 microprocessors. It has first level cache support into the 82C465MV that uses the write-back cache feature found in the Cyrix Corp Cx486DX/DX2 microprocessor, as well as in all existing and future Intel Corp write-back cache microprocessors. When working in tandem with one of these microprocessors, the 465MV increases overall system performance, says the company. The 465MV also supports level two cache with a high-performance, write-back cache controller, again providing a performance benefit. OPTi claims that the approach does not sacrifice power management in its level two cache implementation. The microprocessor can operate in a separate mode designed for power management functions. This enables the microprocessor to execute the power management code without impacting on the application being run at the time, says OPTi. The 465MV’s peripheral activity tracking system enables the power management code to monitor all peripheral activity independent of the status of the peripheral timers. Also, the 465MV incorporates input-output trapping so that when the user writes to a device that is powered down, the 465MV captures the instruction, powers up the device, and then forces the microprocessor to re-execute the instruction says the company. OPTi has integrated a Local Bus IDE controller in the 465MV, a feature that is designed to double IDE performance over an AT implementation. The 465MV operates with the OPTi 82C602, a real-time clock and buffer chip, eliminating most of the support Transitor-to-Transitor Logic. The 82C465MV comes in a 208-pin plastic quad flat pack and costs $18.00 in OEM quantities. Evaluation boards and production quantities are available now.

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