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February 24, 1987

NEXT GENERATION: MATSUSHITA PLANS 0.8 MICRON 10 MIPS 64-BIT MICROPROCESSOR

By CBR Staff Writer

Even as it describes its original 32-bit microprocessor designed to run the Tron native Japanese operating system at the International Solid State Circuits Conference this week, Matsushita Electric Industrial Co is hard at work on design of a 64-bit microprocessor, reports our Tokyo correspondent. The work is being part-funded by a US venture capital company called SAE. According to H Mizuno, head of Matsushita’s Semiconductor Research Centre, Matsushita is moving ahead of the competition with the 64-bit part because the 32-bit part has problems such as the difficulty of running application software. Matsushita is also going it alone because US companies have been unwilling to licence their 32-bit designs to Japanese firms. The 64-bit part is being designed to be implemented to 0.8 micron design rules on a 1 square chip that will integrate a startling 4.5m transistors. The 64-bit part will have a 50MHz clock and is being designed to deliver 10 MIPS; it will also be configured for parallel operation so that 10 boards could deliver 100 MIPS. Its second iteration is to be clocked at 65MHz to deliver 20 MIPS. Matsushita looks to have the design completed by the end of the year. Matsushita sells the Inmos Transputer in Japan, and the Thorn EMI unit will no doubt want to take a close look at the design of the planned chip.

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