A group of leading semiconductor vendors including Motorola, Mitsubishi, NEC and Silicon Graphics have got together to develop an industry standard chip design in a bid to improve performance and make products more reliable. The companies, along with EDA (electronic design automation) tools suppliers, said the aim of the new Open SIPPs (Standard Interconnect Performance Parameters) International (OSI) group is to develop and promote a standard for the so-called ‘Interconnect’ components inside a chip. Interconnects are the multiple layers of conductive material used to connect the devices such as transistors that make up a semiconductor chip. The advent of new, smaller chips below 0.25 microns for devices such as mobile phones and handheld computers has brought an impediment to chip design, sometimes referred to as the interconnect barrier, the company said. This occurs because, at such small sizes, the interconnect dominates the overall performance of chip devices. To make matters worse, a spokesperson for the group told ComputerWire that up till now, there hasn’t been a standard to describe the details of how an interconnect should be designed and hence manufacturers could not accurately predict their performance. Members of OSI, she said, hope to work together to produce the standard, which will then be made available to all EDAs, chip manufacturers and foundries in the industry. A spokesperson for OSI group member AMD said: In deep sub-micron designs, interconnect performance dominates the overall circuit performance. Today designers lack some of the critical information they needed to optimize their chips…..standards are a sensible way to solve that problem because everybody saves time and money.
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