Intel Corp has decided to follow Motorola Inc and Siemens AG and develop 12-inch (300mm) wafer manufacturing techniques. The 300mm process technology development will be carried out at Intel’s D1C development fab in Oregon, where equipment installation is scheduled to begin in early 2000. Intel expects to start manufacturing chips on a 0.13 micron process, using 300mm wafers, by 2002, with a resultant 30% drop in costs. However, Intel is lagging behind Motorola and Siemens in the move towards bigger wafers.
Semiconductor3000, the R&D project set up by Motorola Inc and Siemen’s Infineon Technologies arm to investigate 12-inch (300mm) wafer manufacturing techniques, says that it has produced test wafers that have exceeded the maximum potential yields available from 200mm wafers. The best wafers produced at the pilot production line in Dresden, Germany have wafer test yields of over 60%. Infineon and Motorola estimate that the total R&D cost of the Semiconductor 3000 project will be around $259m – 300mm wafers are expected to eventually mean that the price of production per chip can be reduced by over 30%.
