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April 20, 1994

MOTOROLA, IBM PREVIEW POWERPC 604, FOR YEAR-END

By CBR Staff Writer

As promised, Motorola Inc and IBM Corp unveiled the PowerPC 604 processor. The 32-bit processor has one floating point unit, but three integer units – two for single clock cycle instructions, the other for integer multiplication and division. The chip has estimated SPECint92 and Specfp92 ratings of 160 and 165 respectively. It integrates a whopping 3.6m transistors and has separate 16Kb four-way set associative instruction and data caches and has an onboard phase-locked loop which enables the processor to be drive at one, one and a half, two, or three times the bus speed. The estimated benchmark below was for a 100MHz processor being driven at 1.5 times the the 66MHz bus-speed. The MPC604 is already sampling in small quantities to highly favoured customers, but general sampling is set to begin in the third quarter with volume production set for the fourth quarter. IBM will be manufacture the processor at its Burlington, Vermont facility and Motorola at its MOS-11 factory in Austin, Texas. No prices were given. It is being fabricated in 0.5 micron CMOS, but it does not use the new, smaller transistor geometry that made its debut in the 100MHz MPC601, so expect smaller 604s in the future. Aimed at the high-end desktop and server market, the chip consumes between 8W and 10W in normal use. A ‘nap’ mode takes power consumption down to around 400mW.

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