MIPS Technologies Inc duly unveils its new mid-range 64-bit R-Series RISC processor as the R5000 today. Although the R5000 is the evolution of the desktop and Windows NT-centric 4600/4700 Orion part originally designed by Quantum Effect Design, MIPS is talking up R5000’s floating-point performance and two-way superscalar design as suitable for both Unix and NT personal workstations and entry-level servers running three-dimensional OpenGL, Virtual Reality Modelling Language and computer-aided design applications without dedicated image processing boards. It’s for uniprocessors only initially; executives said versions supporting four-way multiprocessing and modified exclusive shared invalid protocols (for distributed shared memory and non-uniform memory architecture support) would be announced next quarter. At 200MHz, the R5000 – the chip formerly identified as D1 – is rated at 5.5 SPECint95 and 5.5 SPECfp95. The 3.3V, 3.6m transistor, 0.35 micron design is being fabricated by Integrated Device Technology Inc, NEC Corp and NKK Corp in sizes between 80mm and 90mm square. It will be priced at around $300 in quantity later this quarter. NEC is expected to do an 0.25 micron ‘system-on-a-chip derivative’ sometime after. Based on the MIPS IV instruction set – which also features in the floating-point intensive R8000 and the delayed high-end R10000 – the part comes with 32Kb on-chip cache (the 4600 has 16Kb) and support for up to 2Mb secondary cache. The MIPS IV architecture includes the company’s multiply-add instructions which accelerate geometry processing in three-dimensional graphics applications. A planned 240MHz iteration will now appear as a 250MHz part later in the year and is expected to do 6.8 SPECint95 and 6.8 SPECfp95. An R5000A is slated for 1997; D2 has been seen for 1998. By comparison, Intel Corp’s 133MHz Pentium is rated at 4.1 SPECint95 and 2.5 SPECfp95, the 200MHz PentiumPro at 8.1 SPECint95 and 6.0 SPECfp95, the 166MHz PowerPC 604e is at 5.2 SPECint95 and 4.3 SPECfp95. Although it would not comment, R5000 systems from MIPS parent Silicon Graphics Inc are expected by mid-year – presumably to replace the low-end R4600-based Indy – and are likely to be announced later this quarter. MIPS devotee Siemens Nixdorf Informationssysteme AG says it will use the R5000 RISC in its low-end RM200 and 300 lines. Meantime MIPS’ R10000, the R4000/4400 follow-on destined for high-end workstations and servers originally slated for the end of 1995 is now expected to in a new series of Silicon Graphics’ high-end Onyx graphics subsystem at month-end. The 200MHz R10000 has been touted at 7.5 SPECint95 and 15.0 SPECfp95, and it measures some 300mm square.
