MIPS Computer Systems Inc and its system and semiconductor partners have outlined the technology road map for its RISC architecture, previewed here last month (CI No 1,886). It appears that the high-end part we called the R10000 is code-named T5 and that there are two derivative product lines from it: a very high-performance processor code-named TFP, designed for technical computing, and a low-power, low-cost processor codenamed VRX, targeted at notebook and battery-powered computers. The R4000 family will move up in clock rate to 75MHz by year-end from the present 50MHz, and to 100MHz in 1993. By mid-1993, the R4000 will be followed by an enhanced performance R5000, offering larger on-chip caches and more than 150 SPECmarks of balanced performance for commercial desktops and workstations. The R1000 will be a single-chip superscalar implementation of the MIPS architecture that will deliver more than 500 MIPS peak. The CMOS TFP is designed to deliver Cray Research Inc Y-MP-class performance for floating-point scientific and multiprocessing applications and is being designed by MIPS’ fiance Silicon Graphics Inc; it is to be commercially available in 1993. The VRX is a low-power version of the R4000 developed by NEC Corp and designed for low-cost systems: it will operate at less 2W at 80MHz, but deliver up to 10 times the performance of competing low-cost personal computers and notebook-sized systems. VRX will be available in the second half of 1993, and will also be multiple-sourced, MIPS said.
