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April 10, 1997updated 05 Sep 2016 12:04pm


By CBR Staff Writer

Intel Corp’s been extra secretive about its forthcoming Merced chip implementation of the 64-bit IA-64 architecture it co- designed with Hewlett-Packard Co, largely to keep the compatible houses such as Advanced Micro Devices Inc from getting a jump on it. However some of its partners, including HP itself, are becoming increasingly frustrated at their inability to be able to pass on product information to key commercial and enterprise customers which have IT plans stretching three or in some cases five years into the future. HP says these types of customers need information of future products 18 months, or better two years ahead of product introduction, and have been trying, with little apparent success to get Intel to open up. It has even resorted to asking the press corps to try and get the message through. Maybe the first chink in the armor was seen during Intel CEO Andy Grove’s keynote at the Innovate 97 conference hosted in Houston, Texas, by Compaq Computer Corp. Grove’s presentation showed Merced hitting the streets late 1998 or early 1999. By that time, processor implementations of both its 32-bit IA-32 and 64-bit IA- 64 instruction sets will reportedly be done in 0.18 micron technology. That’s around the same design point the PowerPC camp expects to be with its G4 architecture in 1999.

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