Meiko World Inc, the holding company of Meiko Scientific in Waltham, Massachusetts, is in serious dialogue about making a private share placing in the US, according to chief executive Miles Chesney. Chesney, also managing director of Meiko Ltd’s UK research and development operation in Bristol, says the placing aims to raise a significant amount of funds to help finance the project to build a TeraFLOPS-peak massively parallel machine due for shipment next year, for a cost of around $50m. No further details were given, although as an active participant in the Esprit GP MIMD general purpose supercomputing project, Meiko is known to be closely reflecting the GP MIMD architecture in its own product line. For comparison, the GP MIMD consortium, comprising Meiko, Parsys Ltd and Telmat Informatique SA, in February issued a statement of what characteristics would be required in a TeraFLOPS machine – a price of under $60m, a footprint of less than 1,350 square feet, under 300KW power consumption, fewer than 4,000 processing nodes, 256Gb to 1Tb global memory, 2Tbps aggregate memory bandwidth, 500Gbps bi-sectional network bandwidth, up to 10Gps file system bandwidth, up to 10Tb total file system storage, Unix as an operating system and Fortran as a programming language. It should be able also to support up to 1,000 concurrent users. The GP MIMD TeraFLOPS machine, due in beta test next year, is expected to be based on a combination of Sparc and Intel 80860 processors, as is Concerto, the consortium’s current offering. Meiko’s Computing Surface is based on a Sparc and 80860 chip combination, using the Inmos Transputer for inter-processor communications. Electronic News reports that Meiko is looking at Digital Equipment Corp’s Alpha, Hewlett-Packard Co’s PA-RISC and the upcoming 80586 as possible additions to its current offerings, though Chesney told Computergram that this has no serious implications: Meiko’s heterogeneous architecture and its system and applications software have all been specifically designed to be independent of the processor.
