Sampling of a virtual microprocessor that includes the isntruction set of the entire Intel iAPX-86 family from the 8086 to the 80386 is due to begin in September at VM Technology Corp in Tokyo, reports Electronic News. VM Technology is funded by Japanese trading giant Mitsui & Co, and is headed by Ascii Corp founder and Microsoft’s former Japanese marketing partner Kazuhiko Nishi before he and Bill Gates fell out. One of their disagreements was over the fact that Nishi wanted to diversify into chips. The other luminary at VM is Masatoshi Shiina, who was previously president of Intel Corp’s Japanese design lab, and contributed to the design of the 4004 and the 8080. The ASIP VM8600S is optimised for MS-DOS, and includes the instruction sets of the 8086, extended 8086, 80286 and 80386 as well as the proprietary VM32 instruction set – but according to Shiina, it could equally well be fabricated to emulate the Motorola 68000 family, Zilog Z80 or any other similar part, and more than one instruction set can be resident at a time. He says, obscurely, that the VM8600S does not include microcode or hardwired logic, but has a flexible microcode implemented in programmable logic arrays. The initial incarnation will be a 32-bit chip clocked at 20MHz with 4Gb address space and 32 32-bit registers, but 16- and 64-bit versions are planned. In 1.2 micron double-metal CMOS, the part will cost $241 initially and volume production at a rate of 100,000 a month is planned for next year.