The new low-powered 65-nm process would give Intel engineers new options in the way they design circuit density, performance and power consumption of battery-operated devices, according to an Intel statement.
Key to reducing power drainage on batteries is transistor design. Currently, there are more than one billion transistors on some chips and electricity often leaks from these microscopic transistors, even whey are not powered up.
Santa Clara, California-based Intel said test chips made on its new 65-nm process have shown transistor leakage reduction by roughly 1,000 times versus its standard process.
