Intel Corp has put a 1999 delivery date on the first of its 64- bit IA-64 processors, Merced, which will also run Hewlett- Packard Co PA-RISC binaries in big-endian mode. It will produce an 0.18 micron process. It was actually beaten to the punch by Hewlett-Packard Co, which announced that its first Merced processor upgrades would ship in 1999 in a report on its web site – see separate story. Intel says Merced will run all software that currently runs on 32-bit processor- based Intel machines. ISVs are already using an IA-64 software simulator to tune applications for Merced; Intel says its been working with around 20 first-tier players for the past two years. Intel and HP will detail the architecture, which they first went public on in their 1994 agreement, at next week’s Microprocessor Forum. Some of the Very Long Instruction Word-type parallelizing techniques which HP had originally associated with the instruction set are being described as explicit parallelism. Intel says it’ll also describe a roadmap detailing future product lines that include 32-bit processors for office, home and mobile devices and 64-bit CPUs for workstations and servers.
