The 80486 microprocessor in development at Intel Corp will be far from a straightforward enhancement of the 80386 architecture with new features. Rather, according to the Newsbytes news wire, it will be a completely new, but upwards-compatible architecture with application of some reduced instruction set computing technology. The wire hears that the RISC features will come to the fore in a new non-80386 mode that will execute most instructions in a single cycle. Intel has said that the 80486 will integrate 1m transistors, and that the company is working towards first deliveries in 1989 (CI No 811). It has also said that the chip will retain binary compatibility with the 80386, and is being designed to deliver mainframe performance in multiprocessor configurations. The company has earlier said that it would be optimised for artificial intelligence.