Less than a week after it announced the delay of its 64-bit chip, Merced, Intel Corp is refusing to be drawn on an upgrade path for its 32-bit users. What it did say is that Tanner, the code name for a forthcoming 32-bit chip, would not serve as the transition path to Merced. We are developing different technology for the migration path, but we’re not talking about it yet, Intel said. The comments came as Intel announced it was redrawing its entire 32-bit road-map to get the CPUs to market quicker. Some of the most significant changes involve Tanner. The chip was expected to debut in mid-to-late 1999. But instead it will appear in the first quarter of that year. The 500MHz processor will also include Katmai instructions; the big brother to MMX and Intel’s way of incorporating 3-D graphics on a chip. There will be other Katmai CPUs running at 500MHz available in the first quarter 1999. The chip will only be made in Slot 1 designs; aimed exclusively at the low-cost, volume PC market. The repositioning strategy also sees the early launch, today, of its low-cost 300MHz desktop Celeron chip, followed by 300MHz and 333MHz versions, both with integrated 128KB Level 2 cache, in the fourth quarter of 1998. The launch of the Pentium II 450Mhz desktop chip has been carried forward to Autumn 1998 with two mobile versions; running at 300Mhz and 333Mhz, due out in the first half of 1999. The 400Mhz Pentium II Xeon server/workstation processor, with 512KB internal Level 2 cache, will be available at the end of this month and move to volume production in July. There will also be a Xeon chip, running at 450Mhz with 1Mb, 2Mb or 512Kb Level 2 cache, available as of the second half of 1998.
