The company has had a taste of success in the HPC market in recent months, as attested to in the most recent ranking of the Top 500 supercomputer sites (see separate story). But now Intel wants an even larger slice of the HPC server pie.

The Madison chip is expected to be announced within the next couple of weeks, and has been widely previewed by Intel and its OEM partners in trade shows and benchmark tests. The top-end Madison chip is expected to run at 1.5GHz and include 6MB of on-chip L3 cache memory and will deliver about a 50% performance boost over the current 1GHz McKinley Itanium 2 processors, which have 3MB of L3 cache.

While this performance boost is great, HPC customers and the OEM partners who build servers and HPC clusters based on Intel chips want even more oomph. So Intel is going to launch a variant of the Madison that has been called the HPC DP Optimized Madison internally at Intel that will have a higher clock speed than 1.5GHz and a smaller L3 cache.

HPC workloads, unlike many commercial workloads, don’t need cache as much as they need clock cycles. Herrmann won’t say how fast the clock speed will be or how small the L3 cache will be, but the smaller the cache, the higher the clocks.

The cache memory on modern chips is a significant piece of the chip real estate and generates the bulk of the heat. If great hunks of it are turned off, the cycle time can increase to the point that the faster core generates the same amount of heat that has been offset by killing some of the cache.

It’s hard to guess, but a Madison with 3MB of L3 cache could run at 1.8GHz, and a Madison with only 1MB of L3 cache could probably go above 2GHz. HPC customers might see a doubling of performance by moving to these HPC-optimized Madisons from McKinleys. That kind of performance jump is going to attract attention, no matter what the Itanium nay-sayers say.

And apparently will the lower price that Intel is expected to put on this HPC variant of the Madison chip. Intel is keen on lowering the cost of a gigaflops of computing power, and increasing the performance and lowering the price of the chip because it has smaller cache should do this.

With this move, Intel is clearly trying to take a little wind out of the sails of Advanced Micro Devices and its OEM partners, who have initially positioned the 64-bit Opteron Hammer family of processors that were announced this spring as a perfect solution for the HPC market. The HPC variant of the Madison chip will start shipping in the third quarter, and all of the Itanium OEMs will have access to it to put it into their machines.

Source: Computerwire