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August 10, 2009

Intel, Micron develop 3-bit-per-cell NAND technology

Expects to unveil 2xnm technology later this year

By CBR Staff Writer

Intel and Micron Technology have developed a new 3-bit-per-cell (3bpc) multi-level cell (MLC) NAND technology, leveraging 34-nanometer (nm) NAND process. The multi-level cell NAND flash chips are used in consumer storage devices such as flash cards and USB drives.

The 3bpc NAND technology is designed and manufactured by IM Flash Technologies (IMFT), the companies’ NAND flash joint venture. The companies claim that the new 3bpc NAND technology produces the industry’s smallest and most cost-effective 32-gigabit (Gb) chip currently available on the market.

Randy Wilhelm, vice president of Intel and general manager of Intel NAND Solutions Group, said: “The move to 3bpc is yet another proof point to the remarkable progress Intel and Micron have made in 34-nm NAND development. This milestone sets the stage for continued silicon leadership on 2xnm process that will help decrease costs and increase the capabilities of our NAND solutions for our customers.”

The companies said that the 32Gb 3bpc NAND chip is 126sqmm. Currently, Micron is sampling and will be in mass production in the fourth quarter of 2009.

Brian Shirley, vice president of Micron’s memory group, said: “We see 3bpc NAND technology as an important piece of our roadmap. We also continue to move forward on further shrinks in NAND that will provide our customers with a world-leading portfolio of products for many years to come.

“Today’s announcement further highlights that Micron and Intel have made great strides in 34-nanometer NAND, and we look forward to introducing our 2xnm technology later this year.”

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