The latest reports on the state of Intel Corp’s 32-bit roadmap suggest that the company won’t be introducing 0.18 micron process upgrades for its Xeon and Celeron line until 2000. The company is supposed to launch its first major product using the smaller die size, the desktop processor codenamed Coppermine, this November. The chip, the next step on from the Pentium III, will feature 256k onboard memory and 256K level 2 cache and run at between 600MHz and 733MHz
The Xeon upgrade, dubbed Cascades, is likely to run at between 600 to 800MHz and use a slot 2 connection. The 550MHz to 700MHz upgrade to the Celeron will feature 128k of level 2 cache. Another revision of the Cascades chip is expected mid-2000, running at 700 to 750MHz and featuring 1 or 2Mb of onboard memory. In the very low end, the integrated design, Timna will arrive towards the end of 2000, running at between 533 and 700MHz with 128K of level 2 cache memory.
The next major step on Intel’s roadmap will come with the introduction of the ‘P7’ microarchitecture late in 2000. The first chip based on the new design will be Willamette, the delayed successor to today’s P6 desktop CPUs. The chip is expected to run at clockspeeds of over 1GHz. Foster, the 32-bit server chip that is expected to run applications faster than Intel’s first IA-64 parts, appears to have been pushed back until at least the first quarter of 2001. Intel is planning to start to migrate to copper interconnect technology and a 0.13-micron process at about the same time.
