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September 16, 1998


By CBR Staff Writer

Intel Corp has put some more meat on the bones of its 64 and 32 bit roadmap at the Intel Developers Conference in Palm Springs. The company mostly talked up the forthcoming Katmai New Instruction (KNI) list (CI No 3,327) and the two initial processors that will incorporate the 73 instructions that make up KNI- Katmai and Tanner. The list itself includes real time MPEG-2 encode/decode, improved 3D graphics, DVD, AC3 audio and speech recognition instructions. A spokesperson for Intel could not confirm who Intel had collaborated on the voice recognition element – the only real surprise of the KNI set – but claimed that the implementation in hardware brought made traditionally processor-intensive voice applications much nearer to acceptable. Software developers have been working with the KNI list since 1997 and Intel is expecting applications utilizing the multimedia enhancements to be available when Katmai is released in the first quarter 1999, although these will mostly be entertainment packages. The company is hoping that a slew of business packages using KNI list will be out for the end of 1999. Intel has not yet decided what to call the 450MHz and 500MHz, slot 1, ‘Katmai’ CPU which is also expected in the first quarter 1999. It could be carry on as the next in the Pentium PII line or step up to a PIII, or Intel could completely rename the processor, which is aimed at the desktop market. The slot 2, 450/500MHz, KNI-enabled replacement for the Xeon series called Tanner (CI No 3,426), will also be out in the first quarter 1999 and is aimed mainly at the workstation market. Intel has not yet released any details of the pricing on either component. Both processors will be made on a 0.25 micron design process. The next shift is expected to occur in in the second quarter 1999, with the ‘Coppermine’ desktop CPU and ‘Cascade’ server CPU. Both will run at 500MHz or greater, be built to a 0.18 micron process and feature new buses. Intel is changing the packaging on most of its next generation of chips in an attempt to shave a few dollars off OEM costs.

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