Intel is planning to incorporate a converged fabric controller into its Xeon server chips to be developed in next five years, which is expected to enhance server communication while offering efficient cloud, HPC and dense environments.
The firm is planning to deploy the newly acquired IP from Cray, QLogic and Fulcrum to develop chips which incorporate a NIC onto the processor die, reported HPC wire citing Intel Computing unit Technical general manager Raj Hazra.
"The controller will offer bandwidth of more than 100 gigabytes per second, which will be significantly faster than the speed offered by today’s networking and I/O interfaces. The chips have enough transistors to accommodate the controllers, which will only add a few watts of power draw," Hazra said.
The fabric is expected to virtualise I/O and incorporate storage and networking in data centres, and an integrated controller can be employed to offer improved pipe to scale performance all through distributed computing environments.
"We are seeing the role of the fabric far less like a network, in a loosely coupled sense, and far more like a system bus at the datacenter level," Hazra said.
According to Intel, the new controller will deliver bandwidth of about 100GB per second and the chips will also be equipped with required transistors to house the controllers, further adding a few watts of power.
As per the server implementation and system topology, fabrics are claimed to be flexible and are capable of organising traffic patterns in an energy-efficient way.
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Currently positioned outside the processor, the fabric controllers, when incorporated at the transistor level are expected to decrease the amount of energy utilised in obtaining data from the processor and memory.
