Imperas has released models of the new MIPS32 M14K and M14Kc processor cores from MIPS Technologies, including example virtual platforms utilising these cores and support for the cores in Imperas software development tools.
The company said that the M14K family of processors support the new microMIPSTM code compression instruction set architecture (ISA) from MIPS Technologies. All OVP processor models are instruction accurate, and focused on enabling embedded software developers, to have a development environment available early to accelerate the software development cycle.
According to Imperas, virtual platforms utilising these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.
In addition to working with the OVP simulator that has an Eclipse IDE integration, these models work with the tools for multicore software verification, analysis and debug, the company said.
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Imperas said that OVP offers MIPS developers access to M14K models, as well as access to models of other MIPS processors, including the MIPS32 4K, 24K, 34K, 74K and 1004K families of cores. OVP has reference virtual platforms incorporating the MIPS cores, including bare metal platforms and a virtual platform of the MIPS Malta development board. The reference platforms are all available as source code, and can be modified to customise the platform as required for software development.
Simon Davidmann, president and CEO of Imperas and founding director of the OVP initiative, said: “Complex systems and performance and quality requirements demand that developers have state of the art software development tools. OVP was founded to enable users to have fast simulation and other tools for software development, thus accelerating the development cycle.”
