View all newsletters
Receive our newsletter - data, insights and analysis delivered to you
  1. Technology
May 22, 1997updated 05 Sep 2016 12:24pm

IBM WORKS ON CHIP TO RUN JAVA & POWERPC OBJECT CODE

By CBR Staff Writer

IBM Corp is said to be building a prototype microprocessor for running Java and PowerPC object code that could be used in boards for set-top devices and Network Computers. The chips would supposedly be different from other Java chips that execute Java code in hardware, such as Sun Microsystems Inc’s picoJava, in its use of VLIW Very Long Word Instruction Word techniques. A VLIW chip, by definition an instruction-level parallel architecture, would enable multiple instructions, each with many bits – hence long word – to run in one clock cycle on multiple execution units. While VLIW techniques can result in a simpler chip design than either CISC or RISC, because complexity is transferred to the software, VLIW requires a clever compiler to schedule the instructions for processing across the execution units. No existing object code can run on a VLIW chip without a specific instruction set converter. This explains why previous VLIW efforts have largely failed to get off the ground although applications are being developed for use with the VLIW properties of the specialized Philips TriMedia and Chromatic Research Inc Mpact multimedia processors. A paper posted on IBM’s TJ Watson Research Center web server in Yorktown Heights in New York describes the work. Electronic Engineering Times believes the company plans to get around compatibility problems by building the Java chip around an extended version of a PowerPC-based VLIW implementation that’s already in the works. The Center has been working on VLIW techniques since 1986. A VLIW software translator called Daisy – Dynamically Architected Instruction Set from Yorktown – will reportedly convert Java code and PowerPC machine code that the VLIW processor can execute. It eventually plans to develop compatibility for Intel iAPX-86 and S/390 processors. The chip could be used as part of a single-board network computer that would include the chip, cache memory, RAM and boot ROM, and a PowerPC-to-PCI bus bridge to various connections on the board. IBM did not return our calls at press time.

Content from our partners
Green for go: Transforming trade in the UK
Manufacturers are switching to personalised customer experience amid fierce competition
How many ends in end-to-end service orchestration?

Websites in our network
Select and enter your corporate email address Tech Monitor's research, insight and analysis examines the frontiers of digital transformation to help tech leaders navigate the future. Our Changelog newsletter delivers our best work to your inbox every week.
  • CIO
  • CTO
  • CISO
  • CSO
  • CFO
  • CDO
  • CEO
  • Architect Founder
  • MD
  • Director
  • Manager
  • Other
Visit our privacy policy for more information about our services, how New Statesman Media Group may use, process and share your personal data, including information on your rights in respect of your personal data and how you can unsubscribe from future marketing communications. Our services are intended for corporate subscribers and you warrant that the email address submitted is your corporate email address.
THANK YOU