Details of the new RISC processor to be used in IBM’s forthcoming RT replacement RIOS workstations have surfaced in a White Paper distributed to US analysts, says Computer Reseller News. The CPU – codenamed America – will offer an execution rate of five instructions per cycle at peak, and, as expected includes enhanced Micro Channel technology. Rather than follow the single CPU approach followed by most other RISC vendors, IBM has built a RISC module made up of nine different processors, including three independent functional units, a branch processor, a fixed point processor and a floating point processor, all running concurrently. Instruction and data caches will be explicitly visible to the software, simplifying cache implementation, and increasing parallelism between branch and fixed point processors, and between the processors and input-output devices, where an input-output channel controller will interface to Micro Channel, transferring data between system memory and MCA adaptors. The multiple chip architecture enables IBM to implement a more complex CPU, potentially providing a far higher level of performance than its rivals, though IBM gave no details about actual performance.
