IBM’s contribution to the festivities at the New York Hilton was a 128K-bit static claimed to be the fastest anywhere, able to take in or output data at 6Gbits per second. Fabricated in half micron CMOS, the prototype part is pipelined so that it can receive compute and transmit data concurrently. It is organised as 4K by 32 bits so as to work more efficiently with 32-bit CPUs and operates at ECL levels off chip so that it can be used in IBM’s top-end mainframes which are built in ECL these days – no doubt it will turn up in cache and perhaps primary memory for Summit, and likely in the main memory of the machines in development at Steve Chen’s Supercomputer Systems Inc, backed by IBM.
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