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February 10, 2010

IBM Research, EU team up on chip design

Integrated approach to localise and correct bugs on all abstraction levels

By CBR Staff Writer

IBM Research said that it is entering into a collaboration with industry leaders and universities in the European Union to improve the productivity and reliability of semiconductor and electronic systems design.

IBM said that the EU-funded Diamond consortium expects to slash design time and enable significant savings per chip, by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors.

According to IBM, the new integrated approach will localise and correct bugs on all abstraction levels, from specification through implementation down to the silicon layout, and will allow the solution to take advantage of hierarchical diagnosis and correction capabilities incorporating error sources.

The company said that the goal of the Diamond consortium is to cut fault localisation and correction efforts in half, and reduce design time by 23%; and develop new tools and methodologies to help track these errors.

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IBM expects the approach to generate millions of ‘guesses’ on where the bugs might originate, test the reasonable ideas and then offer verification engineers guidelines on how to find and correct the errors, through the incorporation of advanced high performance technology and analytics.

The Diamond consortium partners include the IBM Research – Haifa, Israel; Ericsson, Sweden; Tallinna Tehnikaulikool, Estonia; Linkopings Universitet, Sweden; Universitat Bremen, Germany; Technische Universitat Graz, Austria; TransEDA Systems, Hungary; Testonica Lab, Estonia.

Jaan Raik, senior researcher at Tallinna Tehnikaulikool and coordinator of the Diamond project, said: Designing a microelectronic chip is very expensive and the design costs are the greatest threat to continuation of the semiconductor industry’s phenomenal growth. The increasing gap between the complexity of new systems and the productivity of system design methods can only be mitigated by developing new and more competent design methods and tools.

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