IBM Corp chose Supercomputer ’92 in Minneapolis to announce a very moderately parallel model in the RS/6000 family, calling the thing the IBM Shared Memory System Power/4. It aggregates a gramd total of four 42MHz Power RISCs in a floor-standing tower and is pitched at technical users with large or complex applications, including computational fluid dynamics, finite element analysis and structural dynamics. IBM claims that the Power/4 implements a unique parallel processing architecture, with memory bottlenecks reduced by the use of local memory for each processor in addition to shared system memory, eliminating the need for continuous updating of the cache for each processor unless the data is actually shared. IBM rates the Power/4 at a theoretical 336 MFLOPS peak. The machine has one local memory board slot per processor, taking 16Mb to 128Mb of memory each; seven slots for shared memory, which can be expanded to 896Mb; four disk bays for up to 5.2Gb of internal storage; four Micro Channel buses for a peak aggregate input-output speed of 320M-bytes per second; and 32 Micro Channel slots for external storage media and communications devices. It runs the AIX/6000 3.2 version of Unix with kernel extensions to support parallel processing. The system is being marketed on a per-request basis, with availability planned for December 1. No indication of price was given. Rather more impressive in the parallel stakes is an engineering model of the scalable parallel system in development at the company’s Highly Parallel Supercomputing Systems Laboratory, a moderately parallel machine that will have eight to 64 RS/6000 processors scaling up to 6 GFLOPS peak performance. A 16-processor prototype is being demonstrated.
