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March 23, 1987

IBM “ELEPHANT TRAP FOR CLONEMAKERS” IN NEW PERSONALS

By CBR Staff Writer

High-speed graphics and disk controllers and a very nasty elephant trap for clonemakers, coupled with ultra-low cost manufacturing using robotic assembly of surface mount components are the features expected in IBM’s next generation of Personal Computers, due on April 2 – but opinions are sharply divided on how many of the new generation of machines will be included in the initial announcement. The elephant trap is expected to be a combination of a ROM and four VLSI support circuits, with a Junk Code fingerprint in the ROM, which must be present before many of the functions will operate. Clonemakers will first have to reverse engineer the VLSI cicuits, then decode the ROM, and then find ways of duplicating all the functions without infringing any of IBM’s copyrights. A key problem will be that IBM is believed to have brought manufacturing costs so low that as soon as the first clone does appear it will be able to slash its own prices – gossip is of a dealer price of $600 or less for the low-end 8086-based machines that because of all the extensions, is expected to run faster than the existing AT. The first four models of what is being dubbed the Personal System/2 – models 30, 40, 50 and 60 – see related story, below, have been identified by Winston & Winston, a US industry watcher and public relations firm – but while the Winstons expect all four models to be in the shops on April 2, other observers believe that only one or two will be announced then, with the others following later in the year. The forthcoming CP-DOS 1.0 that will be needed to liberate all the functions of the machine is not expected to be available immediately. IBM is also expected to wind the speed of the Token Ring up fourfold to 16Mbits per second, maintaining NetBIOS compatibility, but Token Ring and LU 6.2 chips are expected to be part of upgrade kits rather than built in from day one. The new machines will all use IBM’s 1M-bit memory chips, organised as 1M by one, in one wait-state memory so that the entry model will start with just the CPU, four VLSI chips and nine memory chips on the motherboard – 85 cents for the memory chips, $2 for each of the arrays, for a manufacturing cost below $100.

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